This invention relates to semiconductor integrated circuits provided with an oscillator circuit and, more particularly, to semiconductor integrated circuits which are low power.
The integration degree of semiconductor integrated circuits such as one-chip microcomputers has been rapidly increased, and increasing number of functions are provided on the ship. Most one-chip computers include an oscillating circuit, and it is necessary to provide only a crystal oscillator or circuit elements including a resistor and a capacitor at a terminal to obtain a basic clock signal.
Meanwhile, in the low power consumption circuits such as a complementary MOS integrated circuit, the internal operation is stopped at the time of a stand-by mode to reduce power consumption.
FIG. 1 is a block diagram showing a relevant portion of such a prior art semiconductor integrated circuit, i.e., one-chip microcomputer, in which the internal operation is stopped at the time of the stand-by mode for reducing the power consumption. More particularly, this is an oscillator circuit 2, which is formed in the integrated circuit and comprises an inverter 4, a resistor 6 and an oscillation feedback circuit including a resistor 12, a crystal oscillator 14 and capacitors 16 and 18. The clock pulses generated from this oscillator circuit are supplied to a timing generator 22. The timing generator 22 generates successive timing signals necessary for various controls under the control of the aforementioned clock pulses.
In the above construction, if it is detected that the power source voltage of the one-chip microcomputer is lower than a prescribed value, a bit corresponding to a flag H of a status register is set to logic "1". When a flip-flop output signal corresponding to the H flag is coupled to the timing generator 22, the timing generator 22 discontinues the generation of the timing signals. As a result, the microcomputer is changed from its operation mode to the stand-by mode. In this way, power consumption is reduced.
In the prior art, however, while the internal operation of the processing circuit is stopped when the stand-by mode is brought about, the oscillator circuit 2 continues operation as it does during the operation mode.
Generally, the oscillating frequency in the oscillator circuit is the same as or higher than the internal operation frequency. Therefore, power consumed by the oscillator circuit 2 is sometimes higher than that consumed in the internal operation, and even by stopping the internal operation at the time of the stand-by mode, the power consumed for the oscillation is not reduced significantly. Therefore, in the prior art the reduction of power consumption was limited.
An object of the invention is to provide a semiconductor integrated circuit, which can be set in an operation mode or a stand-by mode, and in which the power consumption is reduced by stopping the oscillation of the oscillating circuit at the time of the stand-by mode.